ARCS - Conference on Architecture of Computing Systems
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Conference Paper Pulse coupled neural networks with adaptive synapses for image segmentation(Gesellschaft für Informatik e.V., 2004) Schreiter, Jörg; Ramacher, Ulrich; Heittmann, Arne; Matolin, Daniel; Schüffny, René; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.A network of integrate-and-fire neurons with reciprocal synaptic connections to the four next neighbors is considered. The input to each neuron is the feature of an image, i.e. light intensity. Like in the biological archetype synchronization shall be used as an indicator if the input in certain neurons are related or not. Two rules for the unsupervised adaption of the synaptic weigths have been derived to achieve segmentation image of areas belonging to the same feature.Conference Paper Wiederverwendungsgerechte Codegenerierung von FEC-Applikationen für dynamisch rekonfigurierbare Systeme(Gesellschaft für Informatik e.V., 2004) Schneider, J.; Kotzsch, V.; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Dieser Beitrag beschreibt die Bereitstellung wiederverwendbarer Datenpfadkomponenten durch Generatorwerkzeuge für die Klasse der RS- (Reed-Solomon) Fehlerkorrekturcodes. Die Parameterisierbarkeit und Modularisierbarkeit der FEC-(Forward Error Correction) Applikation erfolgt werkzeuggestützt bez. der unterschiedlichen Codeparameter, optimierter Teilkomponenten und der Algorithmenauswahl. Bei der Partitionierung und der Steuerung der Applikation werden partiell/dynamische Rekonfigurationsabläufe ermöglicht. Die durchgeführten Untersuchungen basieren auf dem XILINX-Modular-Design-Flow (MDF) [1]. Für das Prototy- ping stand ein ADM-XRC Board der Firma Alpha Data zur Verfügung [15].Conference Paper File sharing using IP-multicast(Gesellschaft für Informatik e.V., 2004) Trojahner, Kai; Sobe, Peter; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.File sharing systems cause a huge portion of traffic in the Internet. With respect to the peer-to-peer approach, unicast delivery of content is the common case. Unfortunately, an inherent characteristic of filesharing systems employing unicast communication is that the sum of all download rates cannot exceed the sum of all upload rates. As asymmetric internet connections become increasingly popular, this restriction is clearly noticeable in form of low download rates. Together with the observation that popular files are requested by many users within a short time frame, this motivates the usage of multicast communication. This paper analyzes the effects of using IP multicast in a filesharing system.Conference Paper Implementation and evaluation of a parallel-external algorithm for cycle structure computation on a PC-cluster(Gesellschaft für Informatik e.V., 2004) Boursas, Latifa; Keller, Jörg; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.We report on our experiences with the implementation of a parallel algorithm to compute the cycle structure of a permutation given as an oracle. As a sub-problem, the cycle structure of a modified permutation given as a table that is partitioned over N hard disks has to be computed. While a minor point during algorithm design and analysis, we spent most time to implement and tune this particular piece of code. We present the decisions taken during implementation and give preliminary performance figures.Conference Paper Modelling of parameters in supercomputer workloads(Gesellschaft für Informatik e.V., 2004) Song, Baiyi; Ernemann, Carsten; Yahyapour, Ramin; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Evaluation methods for parallel computers often require the availability of relevant workload information. To this end, workload traces recorded on real installations are frequently used. Alternatively, workload models are applied. However, often not all necessary information are available for a specific workload. In this paper, a model is presented to recover an estimated job execution time when this information is not available. The quality of the modelled estimated runtime is evaluated by comparing different workload traces for which this information is available.Conference Paper Modelling cryptonite on the design of a programmable high-performance crypto processor(Gesellschaft für Informatik e.V., 2004) Buchty, Rainer; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Cryptographic algorithms – even when designed for easy implementability on general purpose architectures – still show a huge performance gap between implementations in software and those using dedicated hardware. Such hardware is usually only able to deal with one single algorithm or a very narrowly defined set of algorithms. The tradeoff between speed/throughput and flexibility can be eased by programmable crypto architectures. These can be existing general purpose architectures enhanced by specialized functional units which fulfill the requirements of typical cryptographic algorithms. Alternatively, a fully custom architecture can be designed. In this paper we describe the methods used to design a programmable crypto architecture from scratch. We will introduce a set of typical cryptographic algorithms, investigate their requirements, and finally show the weighted result leading to our Cryptonite architecture.Conference Paper Finite-state modeling, analysis and testing of system vulnerabilities(Gesellschaft für Informatik e.V., 2004) Belli, Fevzi; Budnik, Christof J.; Nissanke, Nimal; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Man-machine systems have several desirable properties, as to user friendliness, reliability, safety, security or other global system attributes. The potential for the lack, or breaches, of any such property constitutes a system vulnerability, which can lead to a situation that is undesirable from user's point of view. This undesired situation could be triggered by special events in the form of intended, or unintended, attacks from the system's environment. We view the undesirable system features as the sum of the situations, which are, mathematically speaking, complementary to the desirable ones that must be taken into account from the very beginning of the system development to achieve a stable system behavior and a robust operation. This work is about the modeling, analysis and testing of both desirable and undesirable system features which can be viewed as relations between the system and its operation.Conference Paper Distributed and parallel data mining on the grid(Gesellschaft für Informatik e.V., 2004) Li, Tianchao; Bollinger, Toni; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.This paper presents the initial design and implementation of a Gridbased distributed and parallel data mining system. The Grid system, namely the Business Intelligence Grid or BIGrid, is based on heterogeneous Grid server configurations and service-oriented Grid architecture. The system follows a layered design, whose infrastructure is divided into three tiers in general - Grid tier, a service tier and a client/portal tier. Issues of design and implementation, including brokering, task scheduling, adaptive mining script preparation and parallelization are discussed. The design and implementation of BIGrid help identify the specific requirements of applying Grid-based data mining in business realm, thus pave way for future design and implementation of a real generic Gridbased data mining system.Conference Paper Root cause analysis as a guide to SRE methods(Gesellschaft für Informatik e.V., 2004) Grams, Timm; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Which Software Reliability Engineering (SRE) methods should be applied during the various phases of the lifecycle of a product? The answer given here centres on learning from errors. The classification and evaluation of methods is strictly based on causal analyses of disasters, accidents and incidents with undesired outcome. The lifecycle model of IEC Standard 61508 has been adopted as a classification scheme. A couple of examples are given. The SRE methods considered here are those of IEC 61508. These methods are dealing with software reliability as well as with the production of highly reliable software. As an example of some more recent proposals Extreme Programming (XP) has been included.Conference Paper Aufbau- und Strukturkonzepte einer adaptiven multigranularenrekonfigurierbaren Hardwarearchitektur(Gesellschaft für Informatik e.V., 2004) Thomas, Alexander; Becker, Jürgen; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Moderne Anwendungsszenarien aus den Bereichen der Multimediaanwendungen und Mobilkommunikation verlangen nach immer leistungsfähigeren Datenverarbeitungsarchitekturen mit immenser Rechenleistung, die durch aktuelle Ansätze wie Mikroprozessoren und DSPs nicht ohne weiteres erreichbar sind. Dieser Beitrag beschreibt ein neues Architekturkonzept aus dem Bereich der rekonfigurierbaren Architekturen [Kr01][Be01][XP02] [XI01][AL01][TR02][AT01][QU01][Go01][Ba01][Zh01], die im Rahmen des DFG Schwerpunktprogramms 1148 „Rekonfigurierbare Rechensysteme“ entwickelt werden und auf die Erforschung und Weiterentwicklung der existierenden array-basierten Ansätze gerichtet ist. Die gewonnenen Erfahrungen und Ergebnisse sollen in eine neue adaptive dynamisch rekonfigurierbare Architektur einfließen, die das Ziel dieses Projekts ist.Conference Paper A distributed SAT solver for microcontroller(Gesellschaft für Informatik e.V., 2004) Schubert, Tobias; Becker, Bernd; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.In this paper we present a parallel prover for the propositional satisfiability problem called PICHAFF. The algorithm is an adaption of the state-of-the-art solver CHAFF optimised for our scalable, dynamically reconfigurable multiprocessor system based on Microchip PIC microcontroller. Like usually in modern SAT solvers it includes lazy clause evaluation, conflict-driven learning, non-chronological backtracking, and clause deletion. A simple but efficient technique called Dynamic Search Space Partitioning is used for dividing the search space into disjoint portions to be treated in parallel by up to 9 processors. Besides explaining of how such a complex algorithm could be implemented on simple microcontroller we also give experimental results demonstrating the potential of the implemented methods.Conference Paper A flexible slotting scheme for TDMA-based protocols(Gesellschaft für Informatik e.V., 2004) Lisner, Jens C.; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Popular fault-tolerant1 TDMA-based protocols like TT-CAN ([Fu00] and [Mu02]), TTP ([KG93]) and FlexRay ([Fl02]) are using a static slotting scheme for bus arbitration. This paper describes a possible solution for a more flexible handling of the slotting, by providing extra time of variable length in the cycle for additional slots. These extra time is only provided if it is requested by the controllers in the network. Another possibility is to configure extra slots statically (to come to a fixed cycle length) and assign the slots dynamically to different controllers. A new node architecture is introduced for improving protection of the bus in case of a faulty controller. An agreement algorithm for determining a new schedule every cycle in the distributed network is presented. The system is capable of tolerating double-faults (one controller and one channel).Conference Paper Towards a selforganized control of wireless multihop ad hoccommunication networks(Gesellschaft für Informatik e.V., 2004) Krause, Wolfram; Glauche, Ingmar; Sollacher, Rudolf; Greiner, Martin; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Conference Paper Hyperreconfigurable architectures as flexible control systems(Gesellschaft für Informatik e.V., 2004) Lange, Sebastian; Middendorf, Martin; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Hyperreconfigurable architectures can change their reconfiguration capabilities dynamically at run-time. For reconfiguration they use two types of reconfiguration steps: i) in hyperreconfiguration steps they change their ability for reconfiguration, ii) in ordinary reconfiguration steps they reconfigure the actual contexts of a computation within the limits that have been set by the preceding hyperreconfiguration step. Hyperreconfigurable architectures have originally been introduced to increase the speed of run-time reconfiguration. In this paper we show that the high flexibility with respect to runtime reconfiguration makes hyperreconfigurable architectures well suited for the control of processes that demand varying amounts of supervision. One advantage of hyperreconfiguration is that the run-time of a control task can be influenced without changing the task itself but only by using different variants of other control tasks that run in parallel. To illustrate the concepts we present the results of simulations with a small hyperreconfigurable architecture where counter and adder control tasks run in parallel.Conference Paper Integration dynamisch rekonfigurierbarer Funktionseinheiten in Prozessoren(Gesellschaft für Informatik e.V., 2004) Pionteck, Thilo; Stiefmeier, Thomas; Staake, Thorsten; Kabulepa, Lukusa D.; Glesner, Manfred; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Dieser Beitrag befaßt sich mit der Integration dynamisch rekonfigurierbarer Architekturen als Funktionseinheiten in RISC Prozessoren mit Befehls-Pipeline. Dabei wird insbesondere auf die Organisation der Konfigurationsdaten sowie die Kontrolle des eigentlichen Rekonfigurationsprozesses eingegangen. Es wird eine Architektur vorgeschlagen, welche leicht in eine Vielzahl von Prozessorarchitekturen integriert werden kann, ohne Änderungen an der Pipelinesteuerung vornehmen zu müssen.Conference Paper VIA2SISCI – A new library that provides the VIA semantics forsci connected clusters(Gesellschaft für Informatik e.V., 2004) Mehlan, Torsten; Rehm, Wolfgang; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Normally the SISCI interface provides a Distributed Shared Memory (DSM) [PTM97] abstraction using the Scalable Coherent Interface (SCI). This paper describes and discusses the design and the concepts behind a library called VIA2SISCI that we have developed. The library maps the semantics of the Virtual Interface Architecture (VIA) to SISCI-semantics and establishes a middleware between SISCI and highlevel communication facilities. We focus on several important concepts of VIA that had to be mapped to the SISCI services. The presented concepts may be interesting and useful beyond the scope of this paper.Conference Paper Network-on-chip basierende Laufzeitsysteme für dynamisch rekonfigurierbare Hardware(Gesellschaft für Informatik e.V., 2004) Hecht, Ronald; Timmermann, Dirk; Kubisch, Stephan; Zeeb, Elmar; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Die Kombination aus Standardprozessoren und rekonfigurierbarer Hardware hat sich in Forschung und kommerziellen Anwendungen mit schnell veränderlichen Parametern und Protokollen als flexible und leistungsfähige Architektur erwiesen. Jedoch werden die Möglichkeiten der dynamischen partiellen Rekonfigurierbarkeit noch nicht ausgenutzt, durch die eine weitere Steigerung der Anpassungsfähigkeit möglich wäre. Die Kontrolle und Steuerung könnte der ohnehin schon vorhandene Prozessor und das darauf laufende Betriebssystem übernehmen. Da aber Umsetzbarkeit und Leistung des Gesamtsystems erheblich von der Schnittstelle zwischen rekonfigurierbarer Hardware und nutzender Anwendung abhängt, sind hier skalierbare und zukunftsweisende Architekturen erforderlich. Im Rahmen dieses Beitrags werden Aspekte zur Erweiterung eines bestehenden Betriebssystems um dynamisch rekonfigurierbare Hardware und dessen Anbindung behandelt. Es wird ein Network-on-Chip basierter Protokollstack vorgestellt und ein Ausblick auf die prototypische Implementierung gegeben.Conference Paper Ant colony optimization for dynamic traveling salesman problems(Gesellschaft für Informatik e.V., 2004) Silva, Carlos A.; Runkler, Thomas A.; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.This paper addresses the optimization of a dynamic Traveling Salesman Problem using the Ant Colony Optimization algorithm. Ants are social insects with limited skills that live in colonies able to solve complex problems. The intelligence of the global society arises from self organization mechanisms, based on the indirect communication between individuals through pheromones. The routing problem here presented is a typical case that requires a self organization type of algorithm, in order to cope with the problem dynamics. The simulation results show how the ant colony optimization is able to solve the different possible routing cases.Conference Paper Leistungsbewertung unterschiedlicher Einbettungsvarianten dynamisch rekonfigurierbarer Hardware(Gesellschaft für Informatik e.V., 2004) Kalte, Heiko; Porrmann, Mario; Rückert, Ulrich; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Die Leistungsfähigkeit eingebetteter dynamisch rekonfigurierbarer Hardware ist von der internen Struktur der rekonfigurierbaren Logik sowie insbesondere von der notwendigen Anbindung an eine Prozessorumgebung abhängig. Ziel dieses Beitrags ist es, die Auswirkungen der Kopplung zwischen Prozessor und Hardware-Erweiterung auf die Leistungsfähigkeit des Gesamtsystems zu analysieren. Hierzu wird die Kommunikation für verschiedene Einbettungsvarianten detailliert modelliert. Anhand eines konkreten Implementierungsbeispiels wird das Modell verifiziert und für eine quantitative Analyse der Einbettung unterschiedlich komplexer Hardware-Erweiterungen in eine Prozessorumgebung genutzt.1Conference Paper Utilizing fault tolerance for achieving QoS in Ad-hoc networks(Gesellschaft für Informatik e.V., 2004) Trikaliotis, Spiro; Brinkschulte, Uwe; Becker, Jürgen; Fey, Dietmar; Großpietsch, Karl-Erwin; Hochberger, Christian; Maehle, Erik; Runkler, Thomas A.Ad-hoc networks consist of many independent wireless nodes which communicate without the help of an infrastructure. Since this type of networks exhibits a dynamic topology, that is, the nodes move very frequently, it is hard to establish some quality-of-service (QoS) in this scenario. This paper presents an approach which accomplishes this. QoS is guaranteed in the sense that the network either can offer these parameters, or it informs the source that it cannot do this anymore. While this guarantee is not so stringent that the network really can guarantee it in every case, in most cases, a QoS degradation as well as a link break will be announced to the sender beforehand, allowing it and the application to take some counter-measures such as putting the system in a safe state before the QoS degrades.